(a) Field of the Invention
The present invention relates to liquid crystal displays (referred as LCDs hereinafter), manufacturing methods thereof and testing methods thereof, in particular, to LCDs having more than two shorting bars, and methods for detecting defects in the LCDs by using the shorting bars.
(b) Description of the Related Art
Shorting bars of a liquid crystal display are used to discharge a electrostatic charges which are generated in the manufacturing process of the LCD and to test the LCD after the manufacturing process is completed.
A conventional LCD is described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of a conventional thin film transistor (referred as TFT hereinafter) substrate for a LCD having shorting bars, FIG. 2 is a enlarged view of the part A in FIG. 1 and FIG. 3 is a cross-sectional view taken along line III–III′ in FIG. 2.
As shown in FIGS. 1 to 3, gate lines G1, G2, G3, G4, . . . are formed on a substrate 1 and extend in the horizontal direction, and a gate pad 10 is formed at one end of each gate fine. A gate shorting bar 20 which electrically connects the gate lines G1, G2, G3, G4, . . . all together is formed on the substrate 1, extends in the vertical direction, and is located opposite the gate lines G1, G2, G3, G4, . . . with respect to the gate pads 10. A pair of testing pads 2 are formed at both ends of the gate shorting bars 20.
A gate insulating film 15 covers a gate wire 5 such as the gate lines G1 G2, G3, G4, . . . , the gate pads 10 and the gate shorting bar 20. Data lines D1, D2, D3, D4, . . . are formed on the gate insulating film 15 and extends in the vertical direction, and a data pad 30 is formed at one end of each data line. A data shorting bar 40 which electrically connects the data lines D1, D2, D3, D4, . . . all together is formed on the gate insulating film 15, extends in the horizontal direction. A pair of testing pads 3 are formed at both ends of the date shorting bars 40. The gate shorting bar 20 and the data shorting bar 40 may be connected to each other by resistor.
A Insulating film 25 covers a data wire including the data lines D1, D2, D3, D4, . . . , the data pads 30 and the data shorting bar 40, and some portions of the insulation films 15 and 25 on the data pads 30 and the gate pads 10 are removed.
Pixel regions are defined as the area surrounded by the two adjacent gate lines and the two adjacent data liens, and a display area includes the pixel regions. A TFT which turns on by a scan signal from the gate line and transmits image signals from the data line into the pixel region is formed in each of the pixel regions.
In this structure, electrostatic charges generated in the manufacturing process are discharged or dispersed through the gate shorting bar 20 and the data shorting bar 40.
Meanwhile, after the manufacturing process and the array test are finished, the gate shorting bar 20 and the data shorting bar 40 are removed by cutting the substrate along line L.
Next, the mechanism of a conventional array test is described with reference to FIGS. 1 and 4.
FIG. 4 shows polarities of signals for array test which are applied in the pixel regions.
Voltages for array test are applied to the testing pads 2 and 3. Since the gate lines G1, G2, G3, G4, . . . and the data lines D1, D2, D3 are respectively connected to the shorting bars 20 and 40, the TFTs of the pixel regions turn on simultaneously and a testing signal is applied in all R, G, B pixels as shown in FIG. 4. Therefore, in the normally white mode the pixel regions PX represent dark state.
In case either that the data wire or the gate wire are disconnected or that the TFT are defected, the pixels related to the defects becomes in a bright states, and thus the defected elements may be detected with ease. However, if more than two gate lines or data lines, for example, the data lines D2 and D3 in FIG. 1, are short-circuited (S1), it is hard to detect the short-circuited elements since the voltage of the same magnitude and polarity is applied to the two data lines D2 and D3.
Meanwhile, if the shorting bar become divided into equal to more than two connected different gate lines or data lines to solve the previously described disadvantage, the detective capability may increase. However, the protecting capability against electrostatic charges may decrease.